alexandra.laylo/crb_lte
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crb_lte/Core/Src/main.c

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C
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/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file : main.c
* @brief : Main program body
******************************************************************************
* @attention
*
* Copyright (c) 2025 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "main.h"
#include "icache.h"
#include "usart.h"
#include "rtc.h"
#include "gpio.h"
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
#include <stdbool.h>
#include "lte_comms.h"
/* USER CODE END Includes */
/* Private typedef -----------------------------------------------------------*/
/* USER CODE BEGIN PTD */
/* USER CODE END PTD */
/* Private define ------------------------------------------------------------*/
/* USER CODE BEGIN PD */
/* USER CODE END PD */
/* Private macro -------------------------------------------------------------*/
/* USER CODE BEGIN PM */
/* USER CODE END PM */
/* Private variables ---------------------------------------------------------*/
/* USER CODE BEGIN PV */
/* USER CODE END PV */
/* Private function prototypes -----------------------------------------------*/
void SystemClock_Config(void);
/* USER CODE BEGIN PFP */
/* USER CODE END PFP */
/* Private user code ---------------------------------------------------------*/
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
/**
* @brief The application entry point.
* @retval int
*/
int main(void)
{
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */
/* MCU Configuration--------------------------------------------------------*/
/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
HAL_Init();
/* USER CODE BEGIN Init */
/* USER CODE END Init */
/* Configure the system clock */
SystemClock_Config();
/* USER CODE BEGIN SysInit */
/* USER CODE END SysInit */
/* Initialize all configured peripherals */
MX_GPIO_Init();
MX_LPUART1_UART_Init();
MX_USART1_UART_Init();
MX_RTC_Init();
MX_ICACHE_Init();
/* USER CODE BEGIN 2 */
// LTE_HardwarePowerUp();
Network_Init();
// LTE_ATSendCommand("AT\r\n", EG91_TOUT_ATSYNC);
// LTE_ATSendCommand("AT\r\n", EG91_TOUT_ATSYNC);
// LTE_ATSendCommand("AT\r\n", EG91_TOUT_ATSYNC);
// LTE_ATSendCommand("AT&F\r\n", EG91_TOUT_300);
// LTE_ATSendCommand("ATE1\r\n", EG91_TOUT_300);
// LTE_ATSendCommand("AT+CMEE=1\r\n", EG91_TOUT_300);
// /* Get the Module Information */
// LTE_ATSendCommand("AT+CGMR\r\n", EG91_TOUT_300);
// LTE_ATSendCommand("AT+CGMM\r\n", EG91_TOUT_300);
// LTE_ATSendCommand("AT+CGMI\r\n", EG91_TOUT_300);
// LTE_ATSendCommand("AT+CGSN\r\n", EG91_TOUT_300);
// LTE_ATSendCommand("AT+QCCID\r\n", EG91_TOUT_300);
// LTE_ATSendCommand("ATI\r\n", EG91_TOUT_300);
// /* Sim Card Commands */
// LTE_ATSendCommand("AT+CPIN?\r\n", EG91_TOUT_5000);
// LTE_ATSendCommand("AT+CREG=1\r\n", EG91_TOUT_300);
// LTE_ATSendCommand("AT+CGREG=1\r\n", EG91_TOUT_300);
// LTE_ATSendCommand("AT+CEREG=1\r\n", EG91_TOUT_300);
// LTE_ATSendCommand("AT+COPS=0\r\n", EG91_TOUT_180000);
// HAL_Delay(2000);
// LTE_ATSendCommand("AT+CGDCONT?\r\n", EG91_TOUT_300);
// LTE_ATSendCommand("AT+CGATT=1\r\n", EG91_TOUT_150000);
// LTE_ATSendCommand("AT+CREG?\r\n", EG91_TOUT_300);
// LTE_ATSendCommand("AT+CGREG?\r\n", EG91_TOUT_300);
// LTE_ATSendCommand("AT+CEREG?\r\n", EG91_TOUT_300);
// LTE_ATSendCommand("AT+COPS?\r\n", EG91_TOUT_180000);
// HAL_Delay(2000);
// LTE_ATSendCommand("AT+CGDCONT?\r\n", EG91_TOUT_300);
// LTE_ATSendCommand("AT+CGATT=1\r\n", EG91_TOUT_150000);
// LTE_ATSendCommand("AT+CREG?\r\n", EG91_TOUT_300);
// LTE_ATSendCommand("AT+CGREG?\r\n", EG91_TOUT_300);
// LTE_ATSendCommand("AT+CEREG?\r\n", EG91_TOUT_300);
// LTE_ATSendCommand("AT+COPS?\r\n", EG91_TOUT_180000);
// HAL_Delay(2000);
// LTE_ATSendCommand("AT+CGDCONT?\r\n", EG91_TOUT_300);
// LTE_ATSendCommand("AT+CGATT=1\r\n", EG91_TOUT_150000);
// LTE_ATSendCommand("AT+CREG?\r\n", EG91_TOUT_300);
// LTE_ATSendCommand("AT+CGREG?\r\n", EG91_TOUT_300);
// LTE_ATSendCommand("AT+CEREG?\r\n", EG91_TOUT_300);
// LTE_ATSendCommand("AT+COPS?\r\n", EG91_TOUT_180000);
// HAL_Delay(2000);
// LTE_ATSendCommand("AT+CSQ\r\n", EG91_TOUT_300);
// LTE_ATSendCommand("AT+QCSQ\r\n", EG91_TOUT_300);
/* USER CODE END 2 */
/* Infinite loop */
/* USER CODE BEGIN WHILE */
uint8_t shut_lte_off = 1;
while (1)
{
if (shut_lte_off == 1)
{
LTE_HardwarePowerDown();
APP_LOG_MSG("LTE TEST DONE\r\n");
shut_lte_off = 0;
}
/* USER CODE END WHILE */
/* USER CODE BEGIN 3 */
}
/* USER CODE END 3 */
}
/**
* @brief System Clock Configuration
* @retval None
*/
void SystemClock_Config(void)
{
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
/** Configure the main internal regulator output voltage
*/
if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1) != HAL_OK)
{
Error_Handler();
}
/** Initializes the CPU, AHB and APB busses clocks
*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI|RCC_OSCILLATORTYPE_HSE;
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
RCC_OscInitStruct.HSEDiv = RCC_HSE_DIV1;
RCC_OscInitStruct.LSIState = RCC_LSI1_ON;
RCC_OscInitStruct.LSIDiv = RCC_LSI_DIV1;
RCC_OscInitStruct.PLL1.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL1.PLLSource = RCC_PLLSOURCE_HSE;
RCC_OscInitStruct.PLL1.PLLM = 2;
RCC_OscInitStruct.PLL1.PLLN = 8;
RCC_OscInitStruct.PLL1.PLLP = 2;
RCC_OscInitStruct.PLL1.PLLQ = 2;
RCC_OscInitStruct.PLL1.PLLR = 2;
RCC_OscInitStruct.PLL1.PLLFractional = 0;
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
{
Error_Handler();
}
/** Initializes the CPU, AHB and APB busses clocks
*/
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2
|RCC_CLOCKTYPE_PCLK7|RCC_CLOCKTYPE_HCLK5;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
RCC_ClkInitStruct.APB7CLKDivider = RCC_HCLK_DIV1;
RCC_ClkInitStruct.AHB5_PLL1_CLKDivider = RCC_SYSCLK_PLL1_DIV2;
RCC_ClkInitStruct.AHB5_HSEHSI_CLKDivider = RCC_SYSCLK_HSEHSI_DIV1;
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK)
{
Error_Handler();
}
}
/* USER CODE BEGIN 4 */
/* USER CODE END 4 */
/**
* @brief This function is executed in case of error occurrence.
* @retval None
*/
void Error_Handler(void)
{
/* USER CODE BEGIN Error_Handler_Debug */
/* User can add his own implementation to report the HAL error return state */
__disable_irq();
while (1)
{
}
/* USER CODE END Error_Handler_Debug */
}
#ifdef USE_FULL_ASSERT
/**
* @brief Reports the name of the source file and the source line number
* where the assert_param error has occurred.
* @param file: pointer to the source file name
* @param line: assert_param error line source number
* @retval None
*/
void assert_failed(uint8_t *file, uint32_t line)
{
/* USER CODE BEGIN 6 */
/* User can add his own implementation to report the file name and line number,
ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
/* USER CODE END 6 */
}
#endif /* USE_FULL_ASSERT */
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